Last updated 2026-07-05
14 Hardware Design Jobs in San Francisco, CA, United States
Browse 14 Hardware Design jobs across San Francisco, CA, United States. Listings are updated hourly and include salary data where available.
Market data for Hardware Design jobs in San Francisco, CA, United States
This category encompasses roles focused on the design, verification, and integration of hardware components and systems.
San Francisco, CA, United States Hardware Design salary data
Salary figures are based on postings with disclosed compensation and are shown as annualized ranges when available.
| Pay type | Low | Median | High |
|---|---|---|---|
| Annual | $123K | $140K–$175K | $210K |
| Scope | P50 salary | P25-P75 range | Samples |
|---|---|---|---|
| San Francisco metro | $195K | $165K-$225K | 628 postings |
| California | $186K | $156K-$224K | 912 postings |
| U.S. | $180K | $146K-$216K | 1,521 postings |
Pay visibility: 9 of 14 visible postings include structured pay data (64%).
Explore San Francisco, CA, United States Hardware Design salary data.
Companies with current Hardware Design listings
| Company | Active jobs |
|---|---|
| OpenAI | 3 |
| Astranis | 2 |
| Neuralink | 2 |
| Xona Space Systems | 2 |
| Atom Computing | 1 |
| Normal Computing Corporation | 1 |
| Physical Intelligence | 1 |
Hardware Design jobs by schedule
| Schedule | Active jobs | Share |
|---|---|---|
| Full time | 14 | 100% |
Hardware Design jobs by seniority
Common Hardware Design job titles
Hardware Design jobs by listed location
| Location | Active jobs | Share |
|---|---|---|
| San Francisco, CA, United States | 8 | 57% |
| South San Francisco, CA, United States | 2 | 14% |
| Burlingame, CA, United States | 2 | 14% |
| San Leandro, CA, United States | 1 | 7% |
| Berkeley, CA, United States | 1 | 7% |
FAQ
- How many Hardware Design jobs are listed in San Francisco, CA, United States?
- This page currently shows 14 Hardware Design jobs in San Francisco, CA, United States.
- What salary data is available for Hardware Design jobs in San Francisco, CA, United States?
- Salary comparison includes San Francisco metro ($195K P50, $165K-$225K P25-P75, 628 postings) and California ($186K P50, $156K-$224K P25-P75, 912 postings).
- Which companies are hiring for Hardware Design roles in San Francisco, CA, United States?
- Current listings include roles from OpenAI (3 jobs, 21%), Astranis (2 jobs, 14%), Neuralink (2 jobs, 14%), Xona Space Systems (2 jobs, 14%), and Atom Computing (1 job, 7%).
- What seniority levels are common for Hardware Design jobs in San Francisco, CA, United States?
- The visible seniority mix includes Mid (9 jobs, 64%), Senior (3 jobs, 21%), Entry (1 job, 7%), and Intern (1 job, 7%).
- What work schedules are common for Hardware Design jobs in San Francisco, CA, United States?
- The visible schedule mix includes Full time (14 jobs, 100%).
- What Hardware Design job titles are common in San Francisco, CA, United States?
- Common titles include Communications / DSP Engineer (1 job, 7%), Design Verification, Forward Deployed Engineering (1 job, 7%), Electrical Engineer (UMI) (1 job, 7%), Electrical Engineer, Compute Architecture (1 job, 7%), and FPGA Associate (Fall 2026) (1 job, 7%).
- What does this market snapshot include?
- Most visible listings are full-time (14 of 14). Mid-level roles account for 9 of 14 listings. 9 of 14 visible postings include structured pay data.
Related jobs
Snapshot updated 1hr, 25m ago
OpenAI
Jun 23- Familiarity and deep experience with the full spectrum of industry-standard RTL-adjacent development and signoff flows, including lint, CDC…
- Experience working closely with architecture, verification, physical design, firmware, performance, and post-silicon teams to deliver compl…
More roles at OpenAI
Samsara
Jun 9- Proficiency with RF simulation tools such as CST, ADS, and with EDA tools such as Altium or Cadence.
- Experience setting up and scaling RF labs for hardware development, characterization, validation, and failure analysis.
SirenOpt
May 28- Strong experience with end-to-end FPGA and MPSoC design, including architecture, RTL development, simulation, synthesis, timing closure, ve…
- Collaborate closely with hardware, electrical, software, algorithm, and systems engineers to support end-to-end FPGA, MPSoC, firmware, and…
Atom Computing
May 28- Responsibilities Design, implement, and test FPGA-based control functions for high-speed arbitrary waveform generation, image acquisition,…
- Proficiency with RTL (SystemVerilog preferred, VHDL acceptable) Expertise in FPGA, microprocessor, and related digital circuit design and f…
Neuralink
May 27- This includes: FPGA device selection and architecture definition RTL development (Verilog / SystemVerilog) Digital signal processing theory…
- Timing closure, clock domain crossing, and resource optimization Integration of high-speed transceivers and external PHY devices Hardware v…
More roles at Neuralink
Physical Intelligence
May 16- PCB Design Expertise: Proficiency in EDA tools (e.g., Altium, Allegro) for complex, multi-layer, high-density interconnect designs, and exp…
- In this role you will: - Drive Hardware Architecture: Lead the electrical design of devices crucial to PI’s data collection,…
Normal Computing Corporation
Apr 30- Thermodynamic ASIC Verification: Provide design verification for internal hardware projects Tool Usability: Set up and evaluate EDA tools,…
- Technical Stack: Advanced proficiency in SystemVerilog, UVM methodology, EDA verification tools (vManager, Xcelium, Jasper), and proficienc…
Astranis
Apr 29- Bonus: Experience with UVM and advanced SystemVerilog verification Experience with Xilinx FPGAs Experience with Vivado IDE, TCL Familiarity…
- FPGA Intern (Fall 2026) Internships at Astranis typically last for twelve weeks, and are hourly roles designed for students who…
More roles at Astranis
Xona Space Systems
Apr 15- Proficiency in VHDL/Verilog/SystemVerilog and FPGA toolchains (Xilinx/AMD).
- FPGA Optimization: Optimize designs for timing closure, latency, power, and resource efficiency (DSP slices, BRAM, LUTs).
More roles at Xona Space Systems